Running Simulink-based Designs on SRC-6
David Meixner, Volodymyr Kindratenko, W. David Pointer · 2006
This paper provides details on how to program an SRC-6 reconfigurable computer [1] using MathWorks Simulink® [2] with Xilinx System GeneratorTM for DSP [3] and Xilinx Blockset [4]. SRC-6 is programmed in SRC’s MAP C programming language [5]. Code development on the SRC-6 platform closely resembles code development on a conventional microprocessor-based system, except for explicit code to support data transfer between the system memory and FPGA-controlled memory. SRC’s CarteTM development environment [5] allows the developer to bring in third party subroutines, called macros, that can be used to extend the functionality of the original language. These macros are typically implemented in Verilog Hardware Description Language (HDL) and are brought into the MAP C program via a configuration file that defines the interface between the macros and MAP C language. We propose a method of using the Verilog source for SRC macros generated from the MathWork’s Simulink-based designs.