The J-Machine architecture and evaluation
William J. Dally, John Sidney Keen, Michael D. Noakes · 2002
The authors discuss the architecture of the J-Machine and evaluate the effectiveness of the mechanisms embodied in the message-driven processor (MDP). The J-Machine is a fine-grained distributed memory multicomputer that provides low-overhead mechanisms for general-purpose parallel computing. Each processing node consists of an MDP and 1 Mbyte of DRAM. The MDP microprocessor integrates communication, computation, and memory management functions in a single VLSI chip. A 512-node J-Machine is operational and is due to be expanded to 1024 nodes in January 1993.>