High level synthesis of data driven ASICs
Baiju V. Patel, Dhiraj K. Pradhan, Israel Koren · 2002
A novel approach to high level synthesis of ASICs based on a data driven execution model is presented. The synthesis procedure is directed at producing highly parallel ASICs providing high throughput through pipelining. The major benefits of the authors' approach are its potential for higher speed, ease of design, ease of verification and testing.>