VLSI design of an algebraic-integer signal processor
Richard A. Games, D. Moulin, Joseph J. Rushanan · 2003
A programmable 128-tap linear systolic FIR filter was implemented in VLSI with a throughput of 5 MHz. The design combines algebraic-integer quantization and residue number system (RNS) processing in order to add a second level of parallelism to integer RNS processing, generalizing the quadratic RNS concept. This 9-b processor performs equivalently to an integer processor with 20 b of dynamic range.>