A bipolar population counter using wave pipelining to achieve 2.5* normal clock frequency
D. Wong, Giovanni De Micheli, Michael J. Flynn, R. Huston · IEEE Journal of Solid-State Circuits · 1992
Wave pipelining is a technique for pipelining digital systems that can increase clock frequency in practical circuits without increasing the number of storage elements. In wave pipelining, multiple coherent waves of data are sent through a block of combinational logic by applying new inputs faster than the delay through the logic. The throughput of a 63-b CML (current mode logic) population counter was increased from 97 to 250 MHz using wave pipelining. The internal circuit is flow-through combinational logic. Novel CAD methods have balanced all input-to-output paths to about the same delay. This allows multiple data waves to propagate in sequence when the circuit is clocked faster than its propagation delay.>