Low power FSM design using Huffman-style encoding
P. Surti, Liang-Fang Chao, Akhilesh Tyagi · 1997
This paper presents a novel approach to synthesize low power FSMs using non#uniform code length. Switching activity is reduced by de# creasing the expected number of state bits switched less than dlog jSje. The state set S of the FSM is decomposed into two sets basedonthe limit state probabilities. The state set with very high probability is encoded with less than dlog jSje bits. The other state set# being less probable# is encoded using more than dlog jSje bits. To the best of our knowledge# this is the #rst time two code lengths are used for one state machine. This encoding is realized by using #ip##ops with gated clock. The logic generating the enable signal of the clock uses only a single minterm. The state sets can be encoded using any uniform#length encoding algorithm with objectives of low power and low area. The experiments show an average of 13# and 18# reduc# tion in power for two encoding algorithms respectively. 1 Introduction LowPower #nite state machine #FSM# synthesis...