Discrete cosine transform generator for VLSI synthesis
J.K. Hunter, John V McCanny · 2002
A generator for the automated design of discrete cosine transform (DCT) cores is presented. This can be used to rapidly create silicon circuits from a high level specification. These compare very favourably with existing designs. The DCT cores produced are scaleable in terms of point size as well as input/output and coefficient wordlengths. This provides a high degree of flexibility. An example, 8-point 1D DCT design, produced occupies less than 0.92 mm/sup 2/ when implemented in a 0.35 /spl mu/m double level metal CMOS technology. This can be clocked at a rate of 100 MHz.