Test generation for comprehensive testing of linear analog circuits using transient response sampling
P.N. Variyam, Abhijit Chatterjee · International Conference on Computer Aided Design · 1997
The problem of testing analog components continues to be the bottleneck in reducing the time-to-market of mixed-signal ICs. In this paper, we present a test generation algorithm for implicit functional testing of linear analog circuits using transient response sampling. Each specification of the circuit under test (CUT) imposes bounds on individual parametric deviations under the single fault assumption. These bounds are mapped on to acceptable ranges of measurements of the transient response of the CUT at various sample points using time domain sensitivity calculations. Any circuit that passes the applied test is also guaranteed to meet its specifications. The simplicity of the test waveform, reduced test generation time and test time show that this testing method is a good alternative to existing testing schemes.