Hardware compilation for software engineers: An ATM example
Martin Fleury, R.P. Self, Andrew C. Downton · IEE Proceedings - Software · 2001
Forthcoming technology such as single-chip RISC/FPGA combinations make hardware compilation, fast prototyping and FPGA replacement of ASICs all more likely. FPGAs have made a software-oriented approach to digital design feasible. Remaining obstacles to this approach are reviewed. The trade-offs between use of an HDL and a C-variant, Handel-C, for logic synthesis are considered, particularly in regard to programmability and the overall design process. A simple example in a likely application area, simulation/emulation of telecommunications switches, illustrates the analysis.