Gigabit ATM Switching: A Concentrator-based Growable Switch Architecture And Performance
Kai Y. Eng, M.J. Karol · LEOS 1993 Summer Topical Meeting Digest on Optical Microwave Interactions/Visible Semiconductor Lasers/Impact of Fiber Nonlinearities on Lightwave Systems/Hybrid Optoelectronic Integration and Packagi · 1993
We have an on-going focused research effort in establishing an architecture and associated technologies for achieving a Gigabit ATM switch of a Terabit throughput capacity. Our goal is to advance our technological capability from feasibility demonstration to technology transfer, and prototyping for field trials is thus part of our research cycle. Our prototyping activities have been guided by a long-term architectural plan based on the theory of the Growable Switch Architecture [l]. Although the architecture is fundamentally independent of its implementation speed and technology, a particular concentrator-based arrangement (32x32 example in Fig. 1) is found to be near-optimal in delay-throughput performance (Fig. 2) and practical for development. Note that this arrangement of Fig. 1 is growable from 8x8 to 32x32. As a first step, we have successfully prototyped a shared-memory 8x8 switch at 2.5 Gb/s per port, and with this, also a stand-alone switch system supporting Universal Line Card Slots for 2.4 Gb/s OC-48, 622 Mb/s OC-12 and 155 Mb/s OC-3 [2,3]. As our prototyping efforts are progressing towards the 32x32 version, we show here how the architecture can be extended to much larger sizes, e.g. 256x256 and 512x512 at 2.5 Gb/s per port. Essential characteristics such as modular growth, priority, multicast and cell sequence maintenance are all guaranteed.