A New Approach to Online FPGA Placement
Mitsuru Tomono, Masaki Nakanishi, Shigeru Yamashita, Kazuo Nakajima, Katsumasa Watanabe · 2006
In a partially reconfigurable FPGA, arbitrary portions of its logic resources and interconnection networks can be reconfigured without affecting the other parts. Thus, several tasks can be mapped and executed concurrently in the FPGA. In order to execute the tasks efficiently using the limited resources of the FPGA, resource management becomes very important. Although some online FPGA placement methods have, recently, been proposed, they cannot handle I/O communications of the tasks. Taking such I/O communications into consideration, we introduce a new approach to online FPGA placement. We present a task placement algorithm which uses I/O routing information of each empty area to select a suitable area for each task. The algorithm uses a combination of two new fitting strategies and modified versions of two existing strategies.