Analytical Performance of One-Step Majority Logic Decoding of Regular LDPC Codes
Rathnakumar Radhakrishnan, Sundararajan Sankaranarayanan, Bane V. Vasic · 2007
In this paper, we present a combinatorial algorithm to calculate the exact bit error rate performance of regular low-density parity check codes under one-step majority logic decoding. Majority logic decoders have regained importance in nano-scale memories due to their resilience to both memory and logic gate failures. This result is an extension of the work of Rudolph on error correction capability of majority-logic decoders.