Optimizing Multistage Decimation and Interpolation Processing—Part II
Mark W. Coffey · IEEE Signal Processing Letters · 2006
We investigate the optimization of the design of multistage decimators or interpolators using finite impulse response (FIR) filters in terms of required storage. We show that the minimization problem may be reduced to one-dimensional root finding, obviating the need for a general high-dimensional optimization procedure. We present explicit analytic expressions and numerical illustrations