A pragmatic approach to the design of self-testing circuits
Yvon Savaria, Bruno Laguë, Bożena Kamińska · 2003
A tool for interactively finding hard-to-test nodes and assessing the impact of test points on random pattern testability is described. With this tool, a set of test points which bring the fault coverage to almost 100% was found for the hardest ISCAS benchmark. It is shown that observation test points only are not sufficient, and thus controllable test points are required. The added test points yield test sets shorter than those necessary with weighted random test sets. On the basis of these findings, a pragmatic approach to built-in self-test (BIST) is proposed. New CMOS BILBO-like test latches that are self-tested are also proposed. A modified implementation for the force-observe (F-O) test points is proposed, and an evaluation of the relative overhead associated with both the circular scan path and the added test points is presented.>