Neural network hardware performance criteria
E. van Keulen, S. Colak, H.C.A.M. Withagen, Hans Hegt · 2002
Nowadays, many real world problems need fast processing neural networks to come up with a solution in real time. Therefore hardware implementation becomes indispensable. The problem is then to choose the right chip that is to be used for a particular application. For this, a proper set of hardware performance criteria is needed to be able to compare the performance of neural network chips. The most important criterion is related to the speed a network processes information with a given accuracy. For this a new criterion is proposed. The 'effective number of connection bits' represents the effective accuracy of a chip. The '(effective) connection primitives per second' criterion now provides a new speed criterion normalized to the amount of information value that is processed in a connection. In addition to this we also propose another new criterion called 'reconfigurability number' as a measure for the reconfigurability and size of a chip. Using these criteria gives a much more neutral view of the performance of a neural network chip than the existing conventional criteria, such as 'connections per second'.>