Design of Four-Valued Operation Circuits of Adder and Subtraction Based on Neuron MOS Transistor
Pengjun Wang, Yuejun Zhang · 2009
The neuron MOS transistor (neuMOS) is a new device with multiple-input gates and one floating gate. It is capable of obtaining a weighted sum calculation of multiple-input gates signals and then operating the threshold based on the result of summation. This paper presents a design scheme of four-valued operation circuits of adder and subtraction based on the characteristics of neuMOS. Firstly, the neuMOS four-valued T gate was designed. Then, the four-valued adder and subtraction circuits were designed by this T gate from the truth tables. The four-valued adder and subtraction is simple in structure, fast in speed, and lower in power consumption when comparing to the traditional adder and subtraction. Furthermore, it is easy to modify the circuit structure to design multi-valued circuits. Finally, PSPICE simulation has verified the designed circuits.