Verification and Codesign of the Package and Die Power Delivery System Using Wavelets
Imad A. Ferzli, Eli Chiprout, Farid N. Najm · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2009
As part of the design of large integrated circuits, one must verify that the power delivery network provides supply and ground voltages to the circuit that are within specified ranges. We introduce the concept of time-frequency description of circuit currents using wavelets, and use that to set up an optimization framework that finds the worst-case supply/ground voltage fluctuations. This framework allows for the quick determination of the impact of either the package or the die on the worst-case behavior, which enables their codesign. This approach has been applied to an industrial microprocessor design, resulting in realistic and nonobvious worst-case waveforms.