High performance dense ring generators
Grzegorz Mrugalski, Moumita Mukherjee, Janusz Rajski, Jerzy Tyszer · IEEE Transactions on Computers · 2006
This paper presents an enhanced architecture of on-chip pseudorandom test pattern generators, test data decompressors, and test response compactors based on ring generators. The new structure is aimed at improving layout and routing properties while, at the same time, reducing propagation delays introduced by associated phase shifters.