A high-level WSI yield simulation system
Jane Harden, J.J. Wang, B.W. Tebbs · 2003
This system generates a description of a cellular wafer-scale design including the cell locations and the interconnections between the cells. The functional interdependency of each cell is also defined in terms of necessary lists. From this description, a database that contains the circuit descriptions is created. The system then determines (according to statistical algorithms) which circuit cells are defective and reports the effective wafer-scale yield of the circuit.>