MUSTC-Testing: Multi-Stage-Combinational Test scheduling at the Register-Transfer Level
Sasi Snigdha Yadavalli, Irith Pomeranz, Sudhakar M. Reddy · 2002
In this paper we discuss a new automatic test scheduling system for architectures that use separate control and data-paths. MUlti-STage-Combinational Testing (MUSTC-Testing) at the Register-Transfer Level significantly eases test generation and can be used in lieu of or to complement sequential test generation at the gate level. We provide a system with eleven signal types to perform test scheduling at the RT level which allows module level pre-computed test sets to be directly used for testing. A test scheduler is then described along with the results obtained.