Built-in self test of digital decimators

Saman Adham, Mark Kassab, Janusz Rajski, Jerzy Tyszer · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 1995

This brief demonstrates a new built-in self test (BIST) scheme designated to improve a testability of digital decimators-commonly used building blocks in digital signal processing (DSP) environment. The proposed solution takes the advantage of operations offered by already existing functional blocks to perform basic testing functions. Thus it drastically reduces the need for an additional testing hardware as well as eliminating the performance degradation usually introduced by traditional BIST schemes. An easy to test implementation of the decimator based on a custom data-path architecture is also analyzed.>

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