DFT Techniques for Memory Macro with Built-In ECC
Keiichi Kushida, N. Otsuka, Osamu Hirabayashi, Yasuhisa Takeyama · 2005
DFT techniques to implement ECC circuitry on memory macro with no additional test cost are proposed. New methodology to design a Hamming code matrix is used to achieve whole ECC system testing with standard memory BIST and conventional test sequence. The proposed ECC techniques are implemented in a 512Kb SRAM macro and demonstrated by hardware characterization with 90nm technology.