Substrate coupling analysis and simulation for an industrial phase-locked loop
Ryan Welch, A.T. Yang · 2002
Current injected into the common chip substrate from fast-switching digital devices can affect the operation of sensitive analog circuits in mixed signal designs. An industrial Phase-Locked Loop (PLL) is analyzed with the non-ideal substrate modeled to show the effects of substrate coupling. Detailed simulation results strongly correlate to the measured circuit jitter. Additional results show that well guard structures should not be used and the effectiveness of ohmic guarding structures depends on number, location in the layout, and the bias scheme.