A 120 mW embedded 3D graphics rendering engine with 6 Mb logically local frame-buffer and 3.2 GByte/s run-time reconfigurable bus for PDA-chip
Ramchan Woo, Chi-Weon Yoon, Jeonghoon Kook, Se-Joong Lee, Kangmin Lee, Yong-Ha Park, Hoi‐Jun Yoo · 2002
An embedded 3D graphics rendering engine (E3GRE) is implemented as a part of a mobile PDA-chip. 6 Mb embedded DRAM (eDRAM) macros attached to 8-pixel-parallel rendering logic are logically localized with 3.2 GByte/s runtime reconfigurable bus, by which the area is reduced by 25%. Polygon-dependent access to eDRAM macros with line-block mapping reduces the power consumption by 70% with the read-modify-write data transaction. E3GRE with 2.22 M polygons/s drawing speed was fabricated using 0.18 /spl mu/m CMOS embedded memory logic technology. Its area and power consumption are 24 mm/sup 2/ and 120 mW, respectively.