Æthereal Network on Chip:Concepts, Architectures, and Implementations
Kees G. W. Goossens, J. Dielissen, Andrei Rădulescu · IEEE Design & Test of Computers · 2005
Many SoC applications require guaranteed levels of service and performance. Can networks on chips (NoCs) enable such guarantees? Here, the authors demonstrate that the Æthereal network can. This particular NoC, developed at Philips Research Laboratories, encompasses hardware, a programming model, and a design flow. Read on to find out about the details. © 2005 IEEE. U7 - Cited By (since 1996): 159 U7 - Export Date: 5 February 2010 U7 - Source: Scopus