A BIST approach for very deep sub-micron (VDSM) defects
Yasuo Satô, T. Ikeya, Michinobu NAKAO, T. Nagumo · 2002
This paper presents a BIST approach for the very deep submicron (VDSM) defects in an ASIC. As bridging or open defects are dominant in VDSM, efficient and accurate tests to detect them are now strongly required. We evaluated the BIST patterns for various criteria. These evaluations and additional real chip experiments have indicated that BIST has better detectability of defects than the conventional stored test.