Sampling rate and quantification density control in VHDL-AMS
Y. Hervé, S. Snaidero · 2005
VHDL-AMS allows designers to describe a system with time dependent equations. If they want to plot a curve y=f(x), it becomes hard to ensure the sampling rate and the quantification density of x and y values. This paper submits a very simple method to control it using a little utility model written in VHDL-AMS, called the "Q/spl I.bar/fier".