Addressing application integrity attacks using a reconfigurable architecture
Joseph Zambreno, Rahul Simha, Alok Choudhary · 2004
Growing concerns regarding application security and software piracy have motivated research in systems that ensure an increased level of tamper resistance while limiting the effectiveness of malicious attacks. These approaches have ranged from simple code restructuring techniques containing run-time checks to complex cryptographic systems. In this work we propose a reconfigurable software protection architecture that places an FPGA between the highest level of on-chip cache and main memory. Instructions requested by the processor are passed through the FPGA component after being fetched from memory. The task of the FPGA is to validate and also possibly transform the instructions in some fashion before sending them back to the processor. As the FPGA configuration can be customized to individual applications, the resultant system can be flexible in meeting both security and performance requirements. Our initial results show that a strong level of security can be obtained with only a limited performance overhead.