New Read Scheme of Variable Vpass-Read for Dual Control Gate with Surrounding Floating Gate (DC-SF) NAND Flash Cell
Hyunseung Yoo, Eun-Seok Choi, Han-Soo Joo, Gyu-Seog Cho, Sung-Kye Park, S. Aritome, Seok-Kiu Lee, Sung-Joo Hong · 2011
New read operation scheme has been proposed for three-dimensional (3D) Dual Control gate with Surrounding Floating gate (DC-SF) NAND flash memory [1]. Based on TCAD and analytic model, the selected cell threshold voltage (VT) is increased by high neighbor cell VT because neighbor cell does not have enough Vpass-read to be "pass-transistor" in conventional read operation. To prevent this neighbor cell high VT effect, higher Vpass-read is applied to control gate (CG) of neighbor cell. And lower Vpass-read is applied to CG of the next neighbor cell to compensate FG potential of neighbor cell. For read operation of multi level cell, Vpass-read modulation has to be decreased corresponding to the selected cell read voltage VR. By using new read scheme, a stable read operation is successfully achieved in DC-SF NAND flash cell for MLC (2bit/cell) and TLC (3bit/cell).