A Parallel Processing Hardware Architecture for Elliptic Curve Cryptosystems
Kazuo Sakiyama, Erik Mulder, Bart Preneel, Ingrid M.R. Verbauwhede · 2006
We propose a parallel processing crypto-processor for elliptic curve cryptography (ECC) to speed up EC point multiplication. The processor consists of a controller that dynamically checks instruction-level parallelism (ILP) and multiple sets of modular arithmetic logic units accelerating modular operations. A case study of HW design with the proposed architecture shows that EC point multiplication over GF(p) and GF(2m) can be improved by a factor of 1.6 compared to the case of using single processing element