A real-time 3D image refinement using two-line buffers
Jong-Hak Kim, Jun‐Dong Cho · International Conference on Advanced Communication Technology · 2011
Recently 3D image processing has been one of vibrant research field. This processing requires very high speed and performance for real-time processing. In this paper, we propose a special memory management unit with n2 two-line buffers (distributed ram), by adjusting read and write speed to match core's speed for efficient pipelining. We synthesize on Vertex 5 from Xilinx, operating 100 MHz clock. Our core unit is a real time refinement core on erosion and dilation, using a 3 by 3 and a 5 by 5 window, respectively, in a 160 by 90 image. Our proposed method is 30 times faster processing time and slightly lower memory consumption than previous one.