An undergraduate computer engineering rapid systems prototyping design laboratory
James O. Hamblen, Hywel L. Owen, S. Yalamanchili, Binh Vien Dao · IEEE Transactions on Education · 1999
This paper describes a new two-quarter undergraduate capstone design class in our computer engineering curriculum. Design groups comprised of students from several different areas of specialization (e.g., software systems, very large scale integration (VLSI) devices and circuits, and computer architecture) design, simulate, implement, and evaluate a complete computing system. Typical examples of projects in the current sequence include a pipelined 32-bit RISC processor, a four-cell systolic array processor, and a video game. The goal is to produce simulation and hardware/software codesign as early as possible in the design process. Students execute software on simulation models prior to any hardware implementation. An assembler and a compiler are developed for the new design. Throughout the sequence, students participate in design reviews and must provide documentation of their designs. The final designs are implemented using an array of field programmable gate arrays (FPGAs) contained in a device called a hardware emulator. This allows for ease of design modifications while still having actual hardware for experimentation.