Verilog nonblocking assignments demystified
Clifford E. Cummings · 2002
Nonblocking assignments are an important construct to accurately model hardware both for behavioral and RTL simulation; however, there are many misunderstandings surrounding how nonblocking assignments work. This paper examines many of the misunderstandings surrounding nonblocking assignments and how nonblocking assignments are appropriately used in behavioral and RTL-synthesis modeling.