Global instruction scheduling for superscalar machines
David H. Bernstein, Michael Rodeh · 1991
To improve the utilization of machine resources in superscalar processors, the instructions have to be carefully scheduled by the compiler.As internal parallelism and pipelining increases, it becomes evident that scheduling should be done beyond the basic block level.A scheme for global (intra-loop) scheduling is proposed, which uses the control and data dependence information summarized in a