A high-performance processor for embedded real-time control
René Cumplido, S. Jones, R.M. Goodall, S. Bateman · IEEE Transactions on Control Systems Technology · 2005
This brief reports on an algorithm and corresponding processor architecture for the construction of high-performance processors targeted at linear time invariant (LTI) control. The overall approach involves reformulating the controller into a particular discrete state-space representation, which is optimized for numerical efficiency using the /spl delta/ operator, then programming this into a specially-designed control system processor (CSP) implemented using a "programmable ASIC" device. This architecture presents large cost and performance benefits for control applications over traditional architectures, particularly for large multiple-input-multiple-output (MIMO) controllers. Results of implementing control of the vertical modes of a Maglev vehicle are presented and compared with implementations using commercial processors.