A scalable delay insensitive asynchronous NoC with adaptive routing
Abdulaziz Alhussien, Chifeng Wang, Nader Bagherzadeh · 2010
Network-on-Chip (NoC) is a very practical and achievable approach to overcome bus limitation problems. However as NoC size increases, clock distribution becomes a major problem in Network-on-Chip systems. Large synchronous NoCs require a fine and complex design of clock tree which leads to large areas and high power consumption. In this paper, we propose an asynchronous NoC (ANoC) that features asynchronous links and asynchronous adaptive routing mechanism. Routers and links are based on Quasi Delay Insensitive (QDI) logic and they only require minimum timing assumptions. This makes the proposed design very scalable and suitable for large Global Asynchronous Local Synchronous Systems. The experiment results show that our proposed ANoC outperforms the synchronous NoC especially when the NoC size becomes large.