An algorithm for area and delay optimisation of sequential machines through decomposition
Ayush Dasgupta, Israel Koren · 1994
Presents a new algorithm for decomposing a Finite State Machine (FSM) to reduce the area and delay. For a known state encoding, it partitions the next state and output bits so as to decrease the cost, which is a function of the area and delay. A state encoding which yields a low cost is derived by using a heuristic algorithm. This algorithm differs from existing algorithms in that it uses a measure for the area that is more reflective of the actual area of the final chip.>