A new structure for multiprocessor implementation of 2-D denominator-separable filters
Daka Raghuramireddy, Rolf Unbehauen · 1991
An efficient multiprocessor implementation of 2-D denominator-separable digital filters for real-time processing is presented based on decomposition techniques and minimizing the throughput delay and maximizing the parallelism. The proposed realization is efficient for the implementation of symmetric fan filters and also suitable for vector processing. The proposed structure possesses a high parallelism and requires a relatively small number of processors; it is amenable to VLSI design with reduced noise properties.>