Bit-Width Allocation for Hardware Accelerators for Scientific Computing Using SAT-Modulo Theory
Adam B. Kinsman, Nicola Nicolici · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2010
This paper investigates the application of computational methods via Satisfiability Modulo Theory (SMT) to the bit-width allocation problem for finite precision implementation of numerical calculations, specifically in the context of scientific computing where division frequently occurs. In contrast to the large body of work targeted at the precision aspect of the problem, this paper addresses the range problem where employing SMT leads to more accurate bounds estimation than those provided by other analytical methods, in turn yielding smaller bit-widths, and hence a reduction in hardware cost and/or increased parallelism, while maintaining robustness as is necessary for scientific applications.