FPGA Circuit Synthesis of Accelerator Data-Parallel Programs
Barry Bond, Kerry Hammil, Lubomir Litchev, Satnam Singh · 2010
This paper describes the techniques used to describe and synthesize FPGA circuits expressed in a data-parallel domain specific language (DSL) called Accelerator. We identify the subset of data-parallel descriptions that are supported by our system and explain how we track memory access patterns which allow us to generate efficient FPGA circuits.