Functional verification of the equator MAP1000 microprocessor
Jian Shen, Jacob A. Abraham, Dave Baker, Tony Hurson, Martin Kinkade, Gregorio Gervasio, Chen-Chau Chu, Guanghui Hu · 1999
The Advanced VLIW architecture of the Equator MAP1000 processor has many features that present signif-icant verification challenges. We describe a functional ver-ification methodology to address this complexity. In par-ticular, we present an efficient method to generate directed assembly tests and a novel technique using the processor it-self to control self-tests and check the results at speed using native instructions only. We also describe the use of emula-tion in both pre-silicon and post-silicon verification stages. 1