Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip
Andreas Hansson, Maarten H. Wiggers, Arno Moonen, Kees G. W. Goossens, Marco J.G. Bekooij · 2008
A network on chip (NoC) with end-to-end flow control is modelled by a cyclo-static dataflow graph. Using the proposed model together with state-of-the-art dataflow analysis algorithms, we size the buffers in the network interfaces. We show, for a range of NoC designs, that buffer sizes are determined with a run time comparable to existing analytical methods, and results comparable to exhaustive simulation.