Efficient Multipliers for the FFT,
S.C. Pohlig, Frankovich,J M · Defense Technical Information Center (DTIC) · 1980
One of the major components in a hardware implementation of the discrete Fourier transform (DFT) is the multiplier hardware. There are algorithms available which reduce the number of multiplication used in computing the DFT, and there are hardware techniques for implementing multipliers. This paper presents an efficient method of using table lookup multipliers for the fat Fourier transform (FFT). This method implements the multipliers with a small number of modest size tables. (Author)