FPGA implementation of a W-CDMA system based on IP functions
Aifeng Ren, Qinye Yin · 2005
Abstract:- This paper presents architecture design and FPGA implementation for W-CDMA transceiver system. Altera high-density, high-performance programmable logic devices (PLDs) combined with intellectual property (IP) functions and the Quartus II development software provide a complete solution for the wireless communications application. The paper describes how to implement a wideband code division multiple access system that conforms to the IMT-2000 standard using Altera field programmable gate array (FPGA) devices and IP functions. Key-Words:- IMT-2000, W-CDMA, Rake receiver, FPGA, Intellectual property, interference cancellation. 1