The VLSI design of a sub-band coder
S. Townes, T. K. Truong · 2005
This paper discusses the VLSI design of a sub-band coder for speech. The focus is upon the architecture for the sub-band filters. A parallel and pipelined architecture is developed using Fermat number transforms which is regular, simple and suitable for VLSI. Considerations for the rest of the coder are also discussed.