A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices
Ali Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan C. van der Veen · 2006
Management of communication by on-line routing in new FPGAs with a large amount of logic resources and partial re configurability is a new challenging problem. A network-on-chip (NoC) typically uses packet routing mechanism, which has often unsafe data transfers, and network interface overhead. In this paper, circuit routing for such dynamic NoCs is investigated, and a practical 1-dimensional network with an efficient routing algorithm is proposed and implemented. Also, this concept has been extended to the 2-dimensional case. The implementation results show the low area overhead and high performance of this network.