Energy aware compilation for DSPs with SIMD instructions
Markus Lorenz, Lars Wehmeyer, Thorsten Dräger · 2002
The growing use of digital signal processors (DSPs) in embedded systems makes the use of optimizing compilers supporting special hardware features necessary. In this paper we present compiler optimizations with the aim of minimizing energy consumption of embedded applications: This comprises loop optimizations for exploitation of SIMD instructions and zero overhead hardware loops in order to increase performance and in this way to decrease the energy consumption. In addition, we use a phase coupled code generator (GCG) based on a genetic algorithm which is capable of performing an energy aware instruction selection and scheduling. Energy aware compilation is done with respect to an instruction level energy cost model which is integrated into our code generator and simulator. Experimental results for several benchmarks show the effectiveness of our approach.