Efficient processor support for DRFx, a memory model with exceptions
Abhayendra Singh, Daniel Marino, Satish Narayanasamy, Todd D. Millstein, Madan Musuvathi · 2011
A longstanding challenge of shared-memory concurrency is to provide a memory model that allows for efficient implementation while providing strong and simple guarantees to programmers. The C++0x and Java memory models admit a wide variety of compiler and hardwareoptimizations and provide sequentially consistent (SC) semantics for data-race-free programs. However, they either do not provide any semantics (C++0x) or provide a hard-to-understand semantics (Java) for racy programs, compromising the safety and debuggability of such programs.