BIST-PLA: a built-in self-test design of large programmable logic arrays
C.-Y. Liu, Kewal K. Saluja, J. Shambhu Upadhyaya · 1987
A new method for designing a Built-In Self-Test Programmable Logic Array (BIST-PLA) is presented. In the proposed design, the Test Pattern Generator and the Response Evaluator circuits are very simple. The design requires a re-arrangement of the AND (OR) planes on the basis of number of crosspoints in the product (output) lines in the PLA.