A Cascadable Neural Network Chip Set With On-chip Learning Using Noise And Gain Annealing
Aarav Kannan Jayakumar, J. Alspector · 1992
We describe a VLSI neural network with on-chip learning that settles through 'thermal annealing'. Full cascadability and connectivity is ensured by a 32 neuron1496 synapse chip and a 1024 synapse chip. The recurrent analog network uses the Boltzmann Machine learning rule to update the weight at each synapse. Two annealing modes, noise and gain, representing the control parameter 'temperature' help settle the network to a global energy minimum. Extrapolated measurements indicate that the network can perform up to lo8, 5-bit connection-updates/sec for on-chip training and this should facilitate implementation of real-time learning systems.